A designer of a data processing system or computer has typically had to accept a design compromise when selecting the maximum physical address space for the system. If a large address space is selected, the cost of the system is increased. Not only must the number of physical wires, drivers, connectors and related components be increased, but the address data size and storage requirements increase as well. For example, a 32 bit address requires twice the storage space of a 16 bit address. However, if the address space of a system is too limited, system performance will be degraded for complex operations which require quick access to a large amount of memory.
One solution to this problem has been to implement memory mapping or paging. In such an arrangement, a mapping memory or paging memory stores the most significant address bits for an expanded address space. For example, a system having a 20 bit address bus that can address 1 megabyte of memory might be used with a mapping memory that provides an additional 4 bits of addressing to accommodate a 16 megabyte address space. Certain locations in the original memory of I/O address space of the computer are reserved for accessing the mapping memory so that the stored most significant 4 address bits can be selectively changed. Once these bits are selected and written into the mapping memory, the computer can use its original address lines to address any location within a page or subset of the expanded memory that is defined by the most significant address bits stored in the mapping memory.
To increase the resolution of the page definitions the mapping memory can also store less significant address bits that overlap the original computer address bits. Typically, the overlapping mapper and computer address bits are added together to obtain the final extended memory space address.
The popular INEL 8088 and 8086 microprocessors essentially use this technique. Each 20 bit output address is a sum of a 16 bit offset address and a 16 bit segment address that is shifted left 4 positions relative to the offset address. This enables most instructions to refer to one of 64K memory locations within a segment using a 16 bit offset address. At the same time, the segment boundaries can be changed by providing an additional 16 bit segment address to increase the total address space to one megabyte anytime it becomes necessary.
A more recent INTEL 80286 microprocessor is operable in a real mode which emulates the INTEL 8086 microprocessor or a protected mode which extends the address space from 1 megabyte to 16 megabytes. While price decreases for memory chips and increasing software complexity make it desirable to use the increased memory capacity, the protected mode in which the increased capacity is available is not compatible with the prior microprocessors. Software manufacturers have thus largely written software for the real mode to attain compatibility with the prior machines and maximize the available market size for their products. The extended memory capacity is generally used only for specialized applications such as a RAM disk which uses memory to simulate a disk drive.
The address modification system of the present invention provides memory access conversion functions which provide a window to an expanded memory space while operating in a real mode or a mode that is compatible therewith. The system provides a full function availability of the extended memory space, not only for memory word accesses, but for direct memory access (DMA 4) operations while retaining full compatibility with hardware interrupt processing.